//~ `New testbench
`timescale  1ns / 1ps

module tb_encode;

// encode Parameters
parameter PERIOD = 10  ;
parameter IDLE  = 4'd0;

// encode Inputs
reg   clk                                  = 1 ;
reg   rst_n                                = 0 ;
reg   en                                   = 0 ;
reg   keyex                                = 0 ;
reg   [127:0]  txt                         = 0 ;
reg   [127:0]  key                         = 0 ;

// encode Outputs
wire  done                                 ;
wire  [127:0]  out                         ;


initial
begin
    forever #(PERIOD/2)  clk=~clk;
end

initial
begin
    #(PERIOD*2) rst_n  =  1;
end

encode u_encode (
    .clk                     ( clk            ),
    .rst_n                   ( rst_n          ),
    .en                      ( en             ),
    .keyex                   ( keyex          ),
    .txt                     ( txt    [127:0] ),
    .key                     ( key    [127:0] ),

    .done                    ( done           ),
    .out                     ( out    [127:0] )
);

initial
begin   
    #(PERIOD*2 + 3);
    txt = 128'h5555_5555_5555_5555_5555_5555_5555_5555;
    key = 128'hAAAA_AAAA_AAAA_AAAA_AAAA_AAAA_AAAA_AAAA;
    en = 1;
    #(PERIOD);
    en = 0;

    @(negedge done);
    $stop;
end

endmodule